Article Published in: 2019 20th International Carpathian Control Conference (ICCC)

May, 2019 SDU published the work “Teaching Hardware Implementation of Neural Networks using High-Level Synthesis in Less Than Four Hours for Engineering Education of Intelligent Embedded Computing

Abstract

This paper presents the motivation and design of a mini-course to teach hardware implementation of neural networks using high-level synthesis (HLS) in less than four hours for engineering education of intelligent embedded computing. By standing on the shoulders of giants, the combination of the real-world problem, decoding the process of neural networks hardware design and using HLS as hands-on lab, the students are able to not only pick up the underlying concepts of digital system design naturally but also implement a real working neural networks hardware accelerator in person. Thus, the main contribution of the work is to facilitate the engineering education of hardware design more engaging and practical.

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